Flipflop
From Academic Kids

 This article is about the electronic component. For other meanings, see flipflop (disambiguation).
In electronics and computing, the flipflop or bistable multivibrator is a pulsed digital circuit capable of serving as a onebit memory. A flipflop typically includes zero, one, or two input signals; a clock signal; and an output signal, though many commercial flipflops additionally provide the complement of the output signal. Some flipflops also include a clear input signal, which resets the current output. (In actuality, flipflops are implemented as integrated circuit chips that also require power and ground connections.) Pulsing, or strobing, the clock causes the flipflop to either change or retain its output signal, based upon the values of the input signals and the characteristic equation of the flipflop. (Strobing the clock is a simplified view: any change of output state actually coincides with either the leading edge or the trailing edge of the clock pulse. The manufacturer's specification, or data sheet, annotates the precise semantics.)
Four types of flipflops find common applicability in clocked sequential systems: these are called the T ("toggle") flipflop, the SR ("setreset") flipflop, the JK flipflop, and the D ("delay") flipflop. The behavior of the flipflop is described by what is termed the characteristic equation, which derives the "next" (i.e., after the next clock pulse) output, <math>Q_{next}<math>, in terms of the input signal(s) and/or the current output, <math>Q<math>.
The first electronic flipflop was invented in 1919 by William Eccles and F. W. Jordan. It was initially called the EcclesJordan trigger circuit.
See also: monostable multivibrator, astable multivibrator.
Contents 
Types of flipflops
T flipflop
If the T input is high, the T flipflop changes state ("toggles") whenever the clock input is strobed. If the T input is low, the flipflop holds the previous value. This behavior is described by the characteristic equation:
<math>Q_{next} = T \oplus Q<math>
and the truth table:
T  Q  Q_{next} 
0  0  0 
0  1  1 
1  0  1 
1  1  0 
Flipflopt.png
Ttype flipflop
SR flipflop
SR_FF_timing_diagram.png
The "set/reset" flipflop sets (i.e., changes its output to logic 1, or retains it if it's already 1) if both the S ("set") input is 1 and the R ("reset") input is 0 when the clock is strobed. The flipflop resets (i.e., changes its output to logic 0, or retains it if it's already 0) if both the R ("reset") input is 1 and the S ("set") input is 0 when the clock is strobed. If both S and R are 0 when the clock is strobed, the output does not change. If, however, both S and R are 1 when the clock is strobed, no particular behavior is guaranteed. This is often written in the form of a "truth table":
S  R  Q_{next} 
0  0  hold 
0  1  0 
1  0  1 
1  1  unstable 
or more explicitly, showing the preclock value of Q as if it were another input:
S  R  Q  Q_{next} 
0  0  0  0 
0  0  1  1 
0  1  X  0 
1  0  X  1 
1  1  X  unstable 
X means "don't care", or the output will be the same regardless of which state the X is in.
Flipflopsr.png
SRtype flipflop
Left: A circuit symbol for a SRtype flipflop, where > is the clock input, S is the set input, R is the reset input, Q is the stored data output, and Q' is the inverse of Q.
It is the responsibility of the circuit designer to ensure that the S = R = 1 condition does not arise. Given this externally imposed condition, one typically avoids writing a characteristic equation for the SR flipflop. Various "masterslave" interconnections of SR flipflops are possible to achieve particular behaviors.
JK flipflop
JK_FF_impulse_diagram.png
The JK flipflop augments the behavior of the SR flipflop by interpreting the S = R = 1 condition as a "flip" command. Specifically, the combination J = 1, K = 0 is a command to set the flipflop; the combination J = 0, K = 1 is a command to reset the flipflop; and the combination J = K = 1 is a command to toggle the flipflop, i.e., change its output to the logical complement of its current value. Setting J = K turns the JK flipflop into a T flipflop.
Flipflopjk.png
JKtype flipflop
Left: A circuit symbol for a JK flipflop, where > is the clock input, J and K are data inputs, Q is the stored data output, and Q' is the inverse of Q.
The characteristic equation of the JK flipflop is:
<math>Q_{next} = J\overline Q + \overline KQ<math>
and the truth table is:
J  K  Q  Q_{next} 
0  0  0  0 
0  0  1  1 
0  1  X  0 
1  0  X  1 
1  1  0  1 
1  1  1  0 
The JK flipflop was named after Jack Kilby, the man who invented integrated circuits in 1958, for which he was awarded the Nobel Prize in Physics for the year 2000. "Jumpkill", as an analogy to "setreset", is a backronym.
D flipflop
The D ("delay") flipflop takes one input, which it conveys to the output when the clock is strobed. Regardless of the current value of the output, it will assume a value 1 if D = 1 when the flipflop is strobed or a value 0 if D = 0 when the flipflop is strobed. This flipflop can be interpreted as a primitive delay line or zeroorder hold, since the data is posted at the output one clock cycle after it arrives at the input.
Flipflopd.png
Dtype flipflop
Left: A circuit symbol for a Dtype flipflop, where > is the clock input, D is the data input and Q is the stored data output.
The characteristic equation of the D flipflop is:
<math>Q_{next} = D \,<math>
The truth table is:
D  Q  Q_{next} 
0  X  0 
1  X  1 
Uses
The flipflop can be used to store one bit, or binary digit, of data. The data contained in several such flipflops may represent the state of a sequencer, the value of a counter, an ASCII character in a computer's memory or any other piece of information.
One use is to build finite state machines from electronic logic. The flipflops remember the machine's previous state, and digital logic uses that state to calculate the next state.
The "T" flipflop is useful for counting. Repeated signals to the clock input will cause the flipflop to change state once per hightolow transition of the clock input, if its T input is "1". The output from one flipflop can be fed to the clock input of a second and so on. The final output of the circuit, considered as the array of outputs of all the individual flipflops, is a count, in binary, of the number of cycles of the first clock input, up to a maximum of 2^{n1, where n is the number of flipflops used. }
One of the problems with such a counter (called a ripple counter) is that the output is briefly invalid as the changes ripple through the logic. There are two solutions to this problem. The first is to sample the output only when it is known to be valid. The second, more widely used, is to use a different type of circuit called a synchronous counter. This uses more complex logic to ensure that the outputs of the counter all change at the same, predictable time.
Frequency division: a chain of "T" flipflops as described above will also function to divide an input in frequency by 2^{n}, where n is the number of flipflops used between the input and the output.
Registers to store numbers in computers. A "D" flipflop can represent one digit of a binary number. The computer's control unit puts out the clock signal at the right time to capture the data.
Timing and Metastability
Clocked flipflops are prone to a problem called metastability, which happens when a data or control input is changing at the instant of the clock pulse. The result is that the output may behave unpredictably, taking many times longer than normal to settle to its correct state, or even oscillating several times before settling. In a computer system this can cause corruption of data or a program crash.
In many cases, metastability in flipflops can be avoided by ensuring that the data and control inputs are held constant for specified periods before and after the clock pulse, called the setup time (t_{su}) and the hold time (t_{h}) respectively. These times are specified in the data sheet for the device, and are typically between a few nanoseconds and a few hundred nanoseconds for modern devices.
Unfortunately, it is not always possible to meet the setup and hold criteria, because the flipflop may be connected to a realtime signal that could change at any time, outside the control of the designer. In this case, the best the designer can do is to reduce the probability of error to a certain level, depending on the required reliability of the circuit. One technique for suppressing metastability is to connect two or more flipflops in a chain, so that the output of each one feeds the data input of the next, and all devices share a common clock. With this method, the probability of a metastable event can be reduced to a negligible value, but never to zero.
Socalled metastablehardened flipflops are available, which work by reducing the setup and hold times as much as possible, but even these cannot eliminate the problem entirely. This is because metastability is more than simply a matter of circuit design. When the transitions in the clock and the data are close together in time, the flipflop is forced to decide which event happened first. However fast we make the device, there is always the possibility that the input events will be so close together that it cannot detect which one happened first. It is therefore logically impossible to build a perfectly metastableproof flipflop.
Another important timing value for a flipflop is the clocktooutput delay (common symbol in data sheets: t_{CO}) or propagation delay (t_{P}), which is the time the flipflop takes to change its output after the clock edge. The time for a hightolow transition (t_{PHL}) is sometimes different from the time for a lowtohigh transition (t_{PLH}).
When connecting flipflops in a chain, it is important to ensure that the t_{CO} of the first flipflop is longer than the hold time (t_{H}) of the second flipflop, otherwise the second flipflop will not receive the data reliably. The relationship between t_{CO} and t_{H} is normally guaranteed if both flipflops are of the same type.
External links
 Summary of flipflop types (http://www.eelab.usyd.edu.au/digital_tutorial/part3/fltypes.htm)cs:Hradlo
da:Flipflop (digital elektronik) de:Flipflop es:Biestable fr:Bascule nl:Flipflop ja:フリップフロップ pl:Przerzutnik sv:Vippa zh:雙穩態多諧振蕩器